/**
 @file ctc_phy_cli.c
 @copyright Copyright(C)  Centec Networks Inc.  All rights reserved.
 @date 2019-10-23
 @version v1.0
*/
#ifdef CTC_PHY_EN
#include "sal.h"
#include "ctc_api.h"
#include "ctcs_api.h"
#include "ctc_cli.h"
#include "ctc_cli_common.h"
#include "ctc_debug.h"
#include "phy_drv_common.h"
#include "phy_drv_api.h"
#ifndef TSINGMA_AX
#include "usw/include/sys/sys_usw_peri.h"
#endif
extern phy_info_t g_phy_port_info[CTC_MAX_PHY_PORT_NUM];

#define PORT_LOOP_START for(loop = 0; loop < CTC_MAX_PHY_PORT_NUM; loop++) \
{\
    port = &g_phy_port_info[loop];\
    if(port->bus == 0xff)\
    {\
        continue;\
    }
#define PORT_LOOP_END }

#if defined(TSINGMA_AX)

static inline int32 
#ifdef CTC_MULTI_CLIENT_EN
cal_set_phy_prop(ctc_vti_t* vty, uint32 gport, ctc_port_property_t port_prop, uint32* value)
#else
cal_set_phy_prop(uint32 gport, ctc_port_property_t port_prop, uint32* value)
#endif
{
    return ctcs_port_set_phy_property(0, gport, CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE, value);
}

static inline int32 
#ifdef CTC_MULTI_CLIENT_EN
cal_get_lchip_num(ctc_vti_t* vty, uint8* lchip_num)
#else
cal_get_lchip_num(uint8* lchip_num)
#endif
{
    *lchip_num = 1;
    return 0;
}

static inline int32 
#ifdef CTC_MULTI_CLIENT_EN
cal_set_port_prop(ctc_vti_t* vty, uint32 gport, ctc_port_property_t port_prop, uint32 value)
#else
cal_set_port_prop(uint32 gport, ctc_port_property_t port_prop, uint32 value)
#endif
{
    return ctcs_port_set_property(0, gport, port_prop, value);
}

#else

static inline int32 
#ifdef CTC_MULTI_CLIENT_EN
cal_set_phy_prop(ctc_vti_t* vty, uint32 gport, ctc_port_property_t port_prop, uint32* value)
#else
cal_set_phy_prop(uint32 gport, ctc_port_property_t port_prop, uint32* value)
#endif
{
    if(g_ctcs_api_en)
    {
        return ctcs_port_set_phy_property(g_api_lchip, gport, port_prop, value);
    }
    else
    {
        return ctc_port_set_phy_property(gport, port_prop, value);
    }
}

static inline int32 
#ifdef CTC_MULTI_CLIENT_EN
cal_get_lchip_num(ctc_vti_t* vty, uint8* lchip_num)
#else
cal_get_lchip_num(uint8* lchip_num)
#endif
{
    if (g_ctcs_api_en)
    {
        return ctcs_get_local_chip_num(g_api_lchip, lchip_num);
    }
    else
    {
        return ctc_get_local_chip_num(lchip_num);
    }
}

static inline int32 
#ifdef CTC_MULTI_CLIENT_EN
cal_set_port_prop(ctc_vti_t* vty, uint32 gport, ctc_port_property_t port_prop, uint32 value)
#else
cal_set_port_prop(uint32 gport, ctc_port_property_t port_prop, uint32 value)
#endif
{
    if(g_ctcs_api_en)
    {
        return ctcs_port_set_property(g_api_lchip, gport, port_prop, value);
    }
    else
    {
        return ctc_port_set_property(gport, port_prop, value);
    }
}
#endif

int8
#ifdef CTC_MULTI_CLIENT_EN
ctc_phy_get_lchip(ctc_vti_t* vty, uint32 gport)
{
    int32 ret = 0;
    uint8 gchip = 0;
    uint8 lchip = 0;
    uint8 lchip_num = 0;

    ret = cal_get_lchip_num(vty, &lchip_num);
#else
ctc_phy_get_lchip(uint32 gport)
{
    int32 ret = 0;
    uint8 gchip = 0;
    uint8 lchip = 0;
    uint8 lchip_num = 0;

    ret = cal_get_lchip_num(&lchip_num);
#endif
    for (lchip = 0; lchip < lchip_num; lchip++)
    {
        ret = cal_get_gchip_id(lchip, &gchip);
#ifndef TSINGMA_AX
        if (ret < 0)
        {
            return -1;
        }
#endif
        if (gchip == CTC_MAP_GPORT_TO_GCHIP(gport))
        {
            return lchip;
        }
    }    
    return ret;
}

/**
*@par CLI
*   phy GPHYPORT_ID ((init|enable|auto-neg|undir|medium|ext_attr TYPE) value VALUE|speed (eth|fe|ge|2g5|5g|xg)|\
    duplex (full|half)|loopback (external|internal|none)) (lchip LCHIP|)
*/
CTC_CLI(ctc_cli_phy_set_port_attr,
        ctc_cli_phy_set_port_attr_cmd,
        "phy (GPHYPORT_ID|all) ((init|enable|auto-neg|undir|medium|ext_attr TYPE) value VALUE|speed (eth|fe|ge|2g5|5g|xg|default)|\
        duplex (full|half|default)|loopback (external|internal|none)) (lchip LCHIP|)",
        "Phy module",
        "Gport id",
        "All phy port",
        "Phy init",
        "Phy enable",
        "Phy auto-neg",
        "Phy undir",
        "Phy medium",
        "Phy extra attribute",
        "Phy extra attribute type",
        "Phy value",
        "Phy config value",
        "Phy speed",
        "Phy speed 10M",
        "Phy speed 100M",
        "Phy speed 1000M",
        "Phy speed 2.5G",
        "Phy speed 5G",
        "Phy speed 10G",
        "Phy speed default",
        "Phy duplex",
        "Phy duplex full",
        "Phy duplex half",
        "Phy duplex default",
        "Phy loopback",
        "Phy loopback external",
        "Phy loopback internal",
        "Phy loopback disable",
        "Lchip",
        CTC_CLI_LCHIP_ID_VALUE)
{
    int32 ret = CLI_SUCCESS;
    uint8 lchip = 0;
    uint32 value = 0;
    uint8 index = 0xff;
    uint32 gport = 0;
    uint8 is_all_port = 0;
    uint32 ext_attr_type = 0;
    uint8 loop = 0;
    phy_info_t *port=NULL;

    ctc_port_property_t property_type = MAX_CTC_PORT_PROP_NUM;

    if (CLI_CLI_STR_EQUAL("all", 0))
    {
        is_all_port = 1;
    }
    else
    {
        CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("lchip");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("lchip", lchip, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("value", value, argv[index + 1]);
    }

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        property_type = CTC_PORT_PROP_PHY_EN;
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_en(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_en(lchip,gport,value);
        }
    }
    else if (CLI_CLI_STR_EQUAL("init", 1))
    {
        property_type = CTC_PORT_PROP_PHY_INIT;
        if(value)
        {
            if(is_all_port)
            {
                PORT_LOOP_START
                ret += ctc_phy_init(lchip,port->port_id);
                PORT_LOOP_END
            }
            else
            {
                ret += ctc_phy_init(lchip,gport);
            }
        }
    }    
    else if (CLI_CLI_STR_EQUAL("speed", 1))
    {
        property_type = CTC_PORT_PROP_SPEED;
        index = CTC_CLI_GET_ARGC_INDEX("speed");
        /* default speed max for all speed */
        value = CTC_PORT_SPEED_MAX;
        if (index != 0xFF)
        {
            if (CLI_CLI_STR_EQUAL("eth", index + 1))
            {
                value = CTC_PORT_SPEED_10M;
            }
            else if (CLI_CLI_STR_EQUAL("fe", index + 1))
            {
                value = CTC_PORT_SPEED_100M;
            }
            else if (CLI_CLI_STR_EQUAL("ge", index + 1))
            {
                value = CTC_PORT_SPEED_1G;
            }
#ifndef TSINGMA_AX
            else if (CLI_CLI_STR_EQUAL("2g5", index + 1))
            {
                value = CTC_PORT_SPEED_2G5;
            }
            else if (CLI_CLI_STR_EQUAL("5g", index + 1))
            {
                value = CTC_PORT_SPEED_5G;
            }
            else if (CLI_CLI_STR_EQUAL("xg", index + 1))
            {
                value = CTC_PORT_SPEED_10G;
            } 
#endif
            else
            {
                value = CTC_PORT_SPEED_MAX;
            }
        }        
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_speed(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_speed(lchip,gport,value);
        }        
    }
    else if (CLI_CLI_STR_EQUAL("duplex", 1))
    {
        property_type = CTC_PORT_PROP_PHY_DUPLEX;
        index = CTC_CLI_GET_ARGC_INDEX("duplex");
        /* default speed max for all duplex */
        value = GLB_DUPLEX_MAX;        
        if (index != 0xFF)
        {
            if (CLI_CLI_STR_EQUAL("full", index + 1))
            {
                value = GLB_DUPLEX_FULL;
            }
            else if (CLI_CLI_STR_EQUAL("half", index + 1))
            {
                value = GLB_DUPLEX_HALF;
            }
            else
            {
                value = GLB_DUPLEX_MAX;
            }
        }         
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_duplex(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_duplex(lchip,gport,value);
        }          
    }
    else if (CLI_CLI_STR_EQUAL("auto-neg", 1))
    {
        property_type = CTC_PORT_PROP_PHY_AUTO_NEG_EN;
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_auto_neg(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_auto_neg(lchip,gport,value);
        }
    }
    else if (CLI_CLI_STR_EQUAL("loopback", 1))
    {
        property_type = CTC_PORT_PROP_PHY_LOOPBACK;
        index = CTC_CLI_GET_ARGC_INDEX("loopback");
        if (index != 0xFF)
        {
            if (CLI_CLI_STR_EQUAL("external", index + 1))
            {
                value = GLB_LB_PHY_FAR;
            }
            else if (CLI_CLI_STR_EQUAL("internal", index + 1))
            {
                value = GLB_LB_PHY_NEAR;
            }
            else if (CLI_CLI_STR_EQUAL("none", index + 1))
            {
                value = GLB_LB_NONE;
            }
        }         
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_loopback(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_loopback(lchip,gport,value);
        }        
    }
    else if (CLI_CLI_STR_EQUAL("undir", 1))
    {
        property_type = CTC_PORT_PROP_UNIDIR_EN;
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_unidir(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_unidir(lchip,gport,value);
        }         
    }
    else if (CLI_CLI_STR_EQUAL("medium", 1))
    {
        property_type = CTC_PORT_PROP_PHY_MEDIUM;
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_medium(lchip,port->port_id,value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_medium(lchip,gport,value);
        }             
    }
    else if (CLI_CLI_STR_EQUAL("ext_attr", 1))
    {
        index = CTC_CLI_GET_ARGC_INDEX("ext_attr");
        CTC_CLI_GET_UINT32("ext_attr type", ext_attr_type, argv[index+1]);
        if(ext_attr_type >= (CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE - CTC_PORT_PROP_PHY_CUSTOM_BASE))
        {
            ext_attr_type = (CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE - CTC_PORT_PROP_PHY_CUSTOM_BASE);
        }      
        property_type = ext_attr_type;
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_ext_attr(lchip,port->port_id,property_type,&value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_ext_attr(lchip,gport,property_type,&value);
        }          
    }
#if 0    
    if(g_ctcs_api_en)
    {
        ret = ctcs_port_set_property(g_api_lchip, gport, property_type, value);
    }
    else
    {
        ret = ctc_port_set_property(gport, property_type, value);
    }
    ctc_cli_out("set property %d value %d\n", property_type, value);

    if (ret < 0)
    {
        ctc_cli_out("%% ret = %d, %s \n", ret, ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
#else
    ctc_cli_out("set property %d value %d\n", property_type, value);
    if (ret < 0)
    {
        ctc_cli_out("%% property_type %d ret = %d\n", property_type,ret);
        return CLI_ERROR;
    }
#endif
    return ret;
}

CTC_CLI(ctc_cli_phy_set_port_attr1,
        ctc_cli_phy_set_port_attr1_cmd,
        "phy (GPHYPORT_ID|all) (probe|update) (lchip LCHIP|)",
        "Phy module",
        "Gport id",
        "All phy port",
        "Phy id probe",
        "Phy status update",
        "Lchip",
        CTC_CLI_LCHIP_ID_VALUE)
{
    int32 ret = CLI_SUCCESS;
    uint8 lchip = 0;
    uint32 value = 0;
    uint8 index = 0xff;
    uint32 gport = 0;
    uint8 is_all_port = 0;
    uint8 loop = 0;
    phy_info_t *port=NULL;
    /* we need use set_phy_property interface for ensure driver probe in sdk */
    //ctc_chip_mdio_para_t para;

    if (CLI_CLI_STR_EQUAL("all", 0))
    {
        is_all_port = 1;
    }
    else
    {
        CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("lchip");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("lchip", lchip, argv[index + 1]);
    }

    if (CLI_CLI_STR_EQUAL("probe", 1))
    {
        if(is_all_port)
        {
            PORT_LOOP_START
            /* we need use set_phy_property interface for ensure driver probe in sdk */
            //ret += ctc_phy_mdio_para_find(port->port_id,&para);
            //ret += ctc_phy_common_probe_id(lchip,&para,&port->phy_id);
#ifdef CTC_MULTI_CLIENT_EN
            ret = cal_set_phy_prop(vty, gport, CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE, &value);
#else
            ret = cal_set_phy_prop(gport, CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE, &value);
#endif
            PORT_LOOP_END
        }
        else
        {
            /* we need use set_phy_property interface for ensure driver probe in sdk */
            //ret += ctc_phy_mdio_para_find(gport,&para);
            //ret += ctc_phy_common_probe_id(lchip,&para,&port->phy_id);
#ifdef CTC_MULTI_CLIENT_EN
            ret = cal_set_phy_prop(vty, gport, CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE, &value);
#else
            ret = cal_set_phy_prop(gport, CTC_PORT_PROP_PHY_CUSTOM_MAX_TYPE, &value);
#endif
        }
    }
    else if (CLI_CLI_STR_EQUAL("update", 1))
    {

        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_get_link_up_status(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_en(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_duplex(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_speed(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_auto_neg(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_loopback(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_medium(lchip,port->port_id,&value);
            ret += ctc_phy_get_port_unidir(lchip,port->port_id,&value);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_get_link_up_status(lchip,gport,&value);
            ret += ctc_phy_get_port_en(lchip,gport,&value);
            ret += ctc_phy_get_port_duplex(lchip,gport,&value);
            ret += ctc_phy_get_port_speed(lchip,gport,&value);
            ret += ctc_phy_get_port_auto_neg(lchip,gport,&value);
            ret += ctc_phy_get_port_loopback(lchip,gport,&value);
            ret += ctc_phy_get_port_medium(lchip,gport,&value);
            ret += ctc_phy_get_port_unidir(lchip,gport,&value);
        }
    }    
    ctc_cli_out("%% Do phy %s ret = %d\n", argv[1],ret);
    if (ret < 0)
    {
        ctc_cli_out("%% Do phy %s ret = %d\n", argv[1],ret);
        return CLI_ERROR;
    }
    return ret;
}

/**
*@par CLI
*   phy read GPHYPORT_ID (ge | xg (dev-addr ADDR)) (reg-addr ADDR)
*@param GPHYPORT_ID phy port id
*@param ge read phy through ge mdio
*@param xg read phy through xg mdio
*@param ADDR after dev-addr, means xg read device id
*@param ADDR after reg-addr, means read phy register address
*/
CTC_CLI(ctc_cli_phy_mdio_read,
            ctc_cli_phy_mdio_read_cmd,
            "phy read GPHYPORT_ID (ge | xg (dev-addr ADDR)) (reg-addr ADDR)",
            "phy module",
            "read operate",
            "Gport id",
            "1GPHY",
            "XGPHY",
            "dev-addr",
            "ADDR",
            "register address",
            "ADDR")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 i = 0;
    uint16 type = 0;
    ctc_chip_mdio_para_t mdio_para = {0};
    phy_info_t *port = NULL;
    uint32 gport = 0;
    //uint16 lport = 0;
    uint16 dev_no = 0;

    sal_memset(&mdio_para, 0, sizeof(ctc_chip_mdio_para_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    //lport = CTC_MAP_GPORT_TO_LPORT(gport);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty, gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif
    //port = &g_phy_port_info[lport];
    for (i = 0; i < CTC_MAX_PHY_PORT_NUM; i++)
    {
        if (g_phy_port_info[i].port_id == gport)
        {
            port = &g_phy_port_info[i];
            break;
        }
    }
    if (!port)
    {
        ctc_cli_out("%% Port %d do not have phy \n",gport);
        return CLI_ERROR;
    }

    if (port->bus == 0xff)
    {
        ctc_cli_out("%% Port %d do not have phy \n",gport);
        return CLI_ERROR;
    }

    index = CTC_CLI_GET_ARGC_INDEX("ge");
    if (0xFF != index)
    {
        type = PHY_CHIP_MDIO_GE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xg");
    if (0xFF != index)
    {
        type = PHY_CHIP_MDIO_XG;
    }

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", mdio_para.reg, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("dev-addr", dev_no, argv[index + 1]);
    }

    mdio_para.bus = port->bus;
    mdio_para.phy_addr = port->phy_addr;
    ret = cal_cli_phy_mdio_read(lchip, type, dev_no, &mdio_para);

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if(PHY_CHIP_MDIO_XG == type)
        ctc_cli_out("Gport %d\nBus: %d\tPHY addr: 0x%x\tdevno: 0x%x\treg: 0x%x\tvalue: 0x%x\n",gport,
            mdio_para.bus,mdio_para.phy_addr, dev_no,mdio_para.reg,mdio_para.value);
    else if(PHY_CHIP_MDIO_GE == type)
        ctc_cli_out("Gport %d\nBus: %d\tPHY addr: 0x%x\treg: 0x%x\tvalue: 0x%x\n",gport,
            mdio_para.bus,mdio_para.phy_addr,mdio_para.reg, mdio_para.value);

    return CLI_SUCCESS;
}

/**
*@par CLI
*   phy write GPHYPORT_ID (ge | xg (dev-addr ADDR)) (reg-addr ADDR value VAL)
*@param GPHYPORT_ID phy port id
*@param ge read phy through ge mdio
*@param xg read phy through xg mdio
*@param ADDR after dev-addr, means xg read device id
*@param ADDR after reg-addr, means read phy register address
*@param VAL data for write to phy register
*/
CTC_CLI(ctc_cli_phy_mdio_write,
            ctc_cli_phy_mdio_write_cmd,
            "phy write GPHYPORT_ID (ge | xg (dev-addr ADDR)) (reg-addr ADDR value VAL)",
            "phy module",
            "write operate",
            "Gport id",
            "1GPHY",
            "XGPHY",
            "dev-addr",
            "ADDR",
            "register address",
            "ADDR",
            "value",
            "VALUE")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 i = 0;
    uint16 type = 0;
    ctc_chip_mdio_para_t mdio_para = {0};
    phy_info_t *port = NULL;
    uint32 gport = 0;
    //uint16 lport = 0;
    uint16 val = 0;
    uint16 dev_no = 0;

    sal_memset(&mdio_para, 0, sizeof(ctc_chip_mdio_para_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    //lport = CTC_MAP_GPORT_TO_LPORT(gport);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    //port = &g_phy_port_info[lport];
    for (i = 0; i < CTC_MAX_PHY_PORT_NUM; i++)
    {
        if (g_phy_port_info[i].port_id == gport)
        {
            port = &g_phy_port_info[i];
            break;
        }
    }
    if (!port)
    {
        ctc_cli_out("%% Port %d do not have phy \n",gport);
        return CLI_ERROR;
    }

    if (port->bus == 0xff)
    {
        ctc_cli_out("%% Port %d do not have phy \n",gport);
        return CLI_ERROR;
    }

    index = CTC_CLI_GET_ARGC_INDEX("ge");
    if (0xFF != index)
    {
        type = PHY_CHIP_MDIO_GE;
    }

    index = CTC_CLI_GET_ARGC_INDEX("xg");
    if (0xFF != index)
    {
        type = PHY_CHIP_MDIO_XG;
    }

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", mdio_para.reg, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("dev-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("dev-addr", dev_no, argv[index + 1]);
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("value", val, argv[index + 1]);
    }
    mdio_para.bus = port->bus;
    mdio_para.phy_addr = port->phy_addr;
    mdio_para.value = val;
    ret = cal_cli_phy_mdio_write(lchip, type, dev_no, &mdio_para);

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

/**
*@par CLI
*   show phy-port status
*@brief show port with phy status about link/speed/duplex/.etc
*/
CTC_CLI(ctc_cli_phy_show_port_attr,
        ctc_cli_phy_show_port_attr_cmd,
        "show phy-port (status | config) (lchip LCHIP|)",
        "Show info about phy port",
        "Phy port",
        "Status about phy port",
        "Config about phy port",
        "Lchip",
        CTC_CLI_LCHIP_ID_VALUE)
{
    uint32 enable,duplex,speed,auto_neg,loopback,medium,undir,link_up;
    uint32 loop = 0;
    phy_info_t *port;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    index = CTC_CLI_GET_ARGC_INDEX("lchip");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("lchip", lchip, argv[index + 1]);
    }

    if (CLI_CLI_STR_EQUAL("status", 0))
    {
        ctc_cli_out("=====================================\n");
        ctc_cli_out("| Port id | bus | addr | en | link | duplex | speed | AN | LP | %-6s | Mdium |\n","Mac_IF");
        
        for (loop = 0; loop < CTC_MAX_PHY_PORT_NUM; loop++)
        {
            port = &g_phy_port_info[loop];
            if(port->phy_id != PHY_TYPE_UNKNOWN)
            {
                ctc_phy_get_port_en(lchip,port->port_id,&enable);
                ctc_phy_get_port_duplex(lchip,port->port_id,&duplex);
                ctc_phy_get_port_speed(lchip,port->port_id,&speed);
                ctc_phy_get_port_auto_neg(lchip,port->port_id,&auto_neg);
                ctc_phy_get_port_loopback(lchip,port->port_id,&loopback);
                ctc_phy_get_port_medium(lchip,port->port_id,&medium);
                ctc_phy_get_port_unidir(lchip,port->port_id,&undir);
                ctc_phy_get_link_up_status(lchip,port->port_id,&link_up);

                ctc_cli_out("| %7d | %3d | %4d | %2d | %4s | %6s | %5s | %2d | %2d | %-6s | %5d |\n",
                    port->port_id,port->bus,port->phy_addr,enable,link_up==1?"up":"down",
                    duplex==1?"full":"half",phy_port_speed_str(speed),auto_neg,
                    loopback,phy_port_interface_str(port->mac_if),medium);

            }
        }
    }
    if (CLI_CLI_STR_EQUAL("config", 0))
    {
        ctc_cli_out("=====================================\n");
        ctc_cli_out("| Port id | bus | addr | en | duplex | speed | AN | LP | Mdium |\n");
        
        for (loop = 0; loop < CTC_MAX_PHY_PORT_NUM; loop++)
        {
            port = &g_phy_port_info[loop];
            if(port->phy_id != PHY_TYPE_UNKNOWN)
            {
                ctc_cli_out("| %7d | %3d | %4d | %2d | %6s | %5s | %2d | %2d | %5d |\n",
                    port->port_id,port->bus,port->phy_addr,port->enable,
                    port->duplex==1?"full":(port->duplex==2?"all":"half"),phy_port_speed_str(port->speed),port->auto_neg_en,
                    port->loopback_mode,port->mdium);

            }
        }
    }

    return CLI_SUCCESS;
}

/**
*@par CLI
*   show phy-port map (filter|)
*@brief show port mapping with mac/mdio bus/mdio addr/phy ID/phy chip index
*@param filter do not show port without phy
*/
CTC_CLI(ctc_cli_phy_show_port_mapping,
        ctc_cli_phy_show_port_mapping_cmd,
        "show phy-port map (filter|)",
        "Show info about phy port",
        "Phy port",
        "Mapping or phy port",
        "filter the port without phy")
{
    uint32 loop = 0;
    uint8 index = 0xFF;
    phy_info_t *port;
    ctc_cli_out("=====================================\n");
    ctc_cli_out("| Port id | Chip_id | Base | Last |  Phy ID  | bus | addr |\n");
    uint8 filter = 0;
    index = CTC_CLI_GET_ARGC_INDEX("filter");
    if (0xFF != index)
    {
        filter = 1;
    }
    
    for (loop = 0; loop < CTC_MAX_PHY_PORT_NUM; loop++)
    {
        port = &g_phy_port_info[loop];
        if(filter)
        {
            if(port->bus == 0xff)
            {
                continue;
            }
        }
        ctc_cli_out("| %7d | %7d | %4d | %4d | %8x | %3d | %4d |\n",
            port->port_id,port->phy_chip_id==PHY_CHIP_INVALID?-1:port->phy_chip_id,
            port->phy_base_port,port->phy_last_port,port->phy_id,port->bus,port->phy_addr);

    }

    return CLI_SUCCESS;
}

#if 0
/**
*@par CLI
*   show phy-port map (filter|)
*@brief show port mapping with mac/mdio bus/mdio addr/phy ID/phy chip index
*@param filter do not show port without phy
*/
CTC_CLI(ctc_cli_phy_show_attr,
        ctc_cli_phy_show_attr_cmd,
        "show phy-driver list (lchip LCHIP|)",
        "Show info about phy",
        "Phy driver",
        "List for phy driver",
        "Lchip",
        CTC_CLI_LCHIP_ID_VALUE)
{
    uint8 lchip = 0;
    uint8 index = 0xFF;
    index = CTC_CLI_GET_ARGC_INDEX("lchip");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT8("lchip", lchip, argv[index + 1]);
    }

#ifndef TSINGMA_AX
    ctc_cli_out("Event Mode: \n");
    ctc_cli_out("\t%d:\t%s\n",CTC_CHIP_PHY_SHIM_EVENT_MODE_SCAN,"Mdio Scan");
    ctc_cli_out("\t%d:\t%s\n",CTC_CHIP_PHY_SHIM_EVENT_MODE_IRQ,"IRQ");
    ctc_cli_out("\t%d:\t%s\n",CTC_CHIP_PHY_SHIM_EVENT_MODE_POLLING,"Polling");
    ctc_cli_out("All driver register for phy: \n");
    ctc_cli_out("=====================================\n");
    ctc_cli_out("|     Phy Name     |  Phy ID  | IRQ | Event Mode | Polling Interval(ms) |\n");

    ctc_slistnode_t        *node = NULL;
    sys_chip_phy_shim_t* p_phy_shim = NULL;
    extern sys_peri_master_t* p_usw_peri_master[CTC_MAX_LOCAL_CHIP_NUM] ;
    CTC_SLIST_LOOP(p_usw_peri_master[lchip]->phy_list, node)
    {
        p_phy_shim = _ctc_container_of(node, sys_chip_phy_shim_t, head);
        if(p_phy_shim->phy_shim.phy_id != 0)
        {
            ctc_cli_out("| %16s | %8x | %3d | %10d | %20d |\n",
                p_phy_shim->phy_shim.phy_name,p_phy_shim->phy_shim.phy_id,
                p_phy_shim->phy_shim.event_mode==CTC_CHIP_PHY_SHIM_EVENT_MODE_IRQ?p_phy_shim->phy_shim.irq[0]:-1,
                p_phy_shim->phy_shim.event_mode,p_phy_shim->phy_shim.poll_interval);
        }
    }
#endif
    return CLI_SUCCESS;
}
#endif

/**
*@par CLI
*   show phy-version
*@brief show phy driver version
*/
CTC_CLI(ctc_cli_phy_show_version,
        ctc_cli_phy_show_version_cmd,
        "show phy-version",
        "Show info about phy",
        "Phy driver version"
        )
{
    ctc_cli_out("Current Phy driver version: \n");
    ctc_cli_out("\t%s\n",CTC_PHY_VERSION);

    return CLI_SUCCESS;
}

/**
*@par CLI
*   phy debug (enable | disable)
*@brief config phy debug print
*/
CTC_CLI(ctc_cli_phy_debug_en,
        ctc_cli_phy_debug_en_cmd,
        "phy debug (enable|disable)",
        "Phy module",
        "Phy debug",
        "eanble debug",
        "disable debug"
        )
{
    if (CLI_CLI_STR_EQUAL("enable", 0))
    {
        phy_debug_enable(1);
    }
    else if (CLI_CLI_STR_EQUAL("disable", 0))
    {
        phy_debug_enable(0);
    }
    return CLI_SUCCESS;
}

/**
*@par CLI
*   phy GPHYPORT_ID pktchecker (enable|disable) (upstream|downstream)
*@brief config phy packet checker enable or disable,check upstream or downstream
*/
CTC_CLI(ctc_cli_phy_set_packet_checker,
        ctc_cli_phy_set_packet_checker_cmd,
        "phy GPHYPORT_ID pktchecker (enable|disable) (upstream|downstream)",
        "Phy module",
        "Gport id",
        "Packet checker",
        "Enable packet checker",
        "Disable packet checker",
        "Check upstream",
        "Check downstream"
        )
{
    int32 ret = CLI_SUCCESS;
    //uint8 loop = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    //uint8 is_all_port = 0;
    //phy_info_t *port=NULL;
    packet_checker_t pktck;

    sal_memset(&pktck, 0, sizeof(packet_checker_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty, gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        pktck.enable = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        pktck.enable = 0;
    }

    if (CLI_CLI_STR_EQUAL("downstream", 2))
    {
        pktck.stream = 0;
    }
    else
    {
        pktck.stream = 1;
    }

#if 0
    if (CLI_CLI_STR_EQUAL("enable", 2))
    {
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_packet_checker(lchip,port->port_id,1,stream);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_packet_checker(lchip,port->port_id,1,stream);
        }
    }
    else if (CLI_CLI_STR_EQUAL("disable", 2))
    {
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_packet_checker(lchip,port->port_id,0,stream);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_packet_checker(lchip,port->port_id,0,stream);
        }
    }
#endif

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_PKT_CK,&pktck);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_pkt_check,
        ctc_cli_phy_show_pkt_check_cmd,
        "show phy-port GPHYPORT_ID pkt-check",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Packet checker"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    packet_checker_t packet_ck;
    uint32 gport = 0;

    sal_memset(&packet_ck, 0, sizeof(packet_checker_t));

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PKT_CK,(void*)&packet_ck);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    if (packet_ck.stream == 0)
    {
        ctc_cli_out("\tDOWNSTREAM\n");
    }
    else if (packet_ck.stream == 1)
    {
        ctc_cli_out("\tUPSTREAM\n");
    }
    else
    {
        ctc_cli_out("\t|  STREAM ERROR  |\n");
    }

    if (packet_ck.enable)
    {
        ctc_cli_out("\tENABLE\n");
    }
    else
    {
        ctc_cli_out("\tDISABLE\n");
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_pkt_check_count,
        ctc_cli_phy_show_pkt_check_count_cmd,
        "show phy-port GPHYPORT_ID pkt-check count",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Packet checker",
        "Packet checker count"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    packet_generator_count_t packet_count;
    uint32 gport = 0;

    sal_memset(&packet_count, 0, sizeof(packet_generator_count_t));

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PKT_COUNT,(void*)&packet_count);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t|   Stream   | RX good count  |  RX error count  |  TX good count  |  TX error count |\n");
    if (packet_count.stream == 0)
    {
        ctc_cli_out("\t| DOWNSTREAM | %14ld | %16d | %15ld | %15d |\n"\
			,packet_count.rx_good,packet_count.rx_error,packet_count.tx_good,packet_count.tx_error);
    }
    else if (packet_count.stream == 1)
    {
        ctc_cli_out("\t|  UPSTREAM  | %14ld | %16d | %15ld | %15d |\n"\
			,packet_count.rx_good,packet_count.rx_error,packet_count.tx_good,packet_count.tx_error);
    }
    else
    {
        ctc_cli_out("\t|  STREAM ERROR  |\n");
    }


    return CLI_SUCCESS;
}


CTC_CLI(ctc_cli_phy_set_packet_genarator,
        ctc_cli_phy_set_packet_genarator_cmd,
        "phy GPHYPORT_ID set pktgen packet_num PKTNUM packet_len PKTLEN addr_en ADDREN addr_da ADDRDA addr_sa ADDRSA",
        "Phy module",
        "Gport id",
        "Setting",
        "Packet genarator",
        "Packet number",
        "PKTNUM",
        "Packet length",
        "PKTLEN",
        "Packet address enable",
        "ADDREN",
        "Packet destination address",
        "ADDRDA",
        "Packet source address",
        "ADDRSA"
        )
{
    packet_generator_t packet_gen;
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    CTC_CLI_GET_UINT16("packet_num", packet_gen.packet_num, argv[1]);
    CTC_CLI_GET_UINT16("packet_len", packet_gen.packet_len, argv[2]);
    CTC_CLI_GET_UINT16("addr_en", packet_gen.addr_en, argv[3]);
    CTC_CLI_GET_UINT8("addr_da", packet_gen.addr_da, argv[4]);
    CTC_CLI_GET_UINT8("addr_sa", packet_gen.addr_sa, argv[5]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_PKT_GEN,&packet_gen);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_pkt_gen_setting,
        ctc_cli_phy_show_pkt_gen_setting_cmd,
        "show phy-port GPHYPORT_ID pktgen setting",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Packet gen",
        "Packet gen setting"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    packet_generator_t packet_gen;
    uint32 gport = 0;

    sal_memset(&packet_gen, 0, sizeof(packet_generator_t));

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PKT_GEN,(void*)&packet_gen);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t packet_num:%d\n",packet_gen.packet_num);
    ctc_cli_out("\t packet_len:%d\n",packet_gen.packet_len);
    ctc_cli_out("\t addr_en:%d\n",packet_gen.addr_en);
    ctc_cli_out("\t addr_da:0x%x\n",packet_gen.addr_da);
    ctc_cli_out("\t addr_sa:0x%x\n",packet_gen.addr_sa);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_packet_genarator_en,
        ctc_cli_phy_set_packet_genarator_en_cmd,
        "phy GPHYPORT_ID pktgen (enable|disable)",
        "Phy module",
        "Gport id",
        "Packet genarator",
        "Eanble packet genarator",
        "Disable packet genarator"
        )
{
    int32 ret = 0;
    int32 en = 0;
    //uint8 loop = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    //uint8 is_all_port = 0;
    //phy_info_t *port=NULL;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

#if 0
    if (CLI_CLI_STR_EQUAL("all", 0))
    {
        is_all_port = 1;
    }
    else
    {
        CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    }

    if (is_all_port)
    {
        return CLI_SUCCESS;
    }

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_packet_gen_en(lchip,port->port_id,1);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_packet_gen_en(lchip,gport,1);
        }
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        if(is_all_port)
        {
            PORT_LOOP_START
            ret += ctc_phy_set_port_packet_checker(lchip,port->port_id,0);
            PORT_LOOP_END
        }
        else
        {
            ret += ctc_phy_set_port_packet_checker(lchip,gport,0);
        }
    }
#endif
    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_PKT_GEN_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_pkt_gen,
        ctc_cli_phy_show_pkt_gen_cmd,
        "show phy-port GPHYPORT_ID pktgen",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Packet gen"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PKT_GEN_EN,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t pktgen_en:%d\n",enable);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_tx_dis,
        ctc_cli_phy_set_tx_dis_cmd,
        "phy GPHYPORT_ID tx_dis (enable|disable)",
        "Phy module",
        "Gport id",
        "TX disable",
        "Eanble TX disable",
        "Disable TX disable"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_TX_DIS,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_tx_dis,
        ctc_cli_phy_show_tx_dis_cmd,
        "show phy-port GPHYPORT_ID tx_dis",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "TX disable"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_TX_DIS,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t tx_dis:%d\n",enable);

    return CLI_SUCCESS;
}
CTC_CLI(ctc_cli_phy_set_vct_en,
        ctc_cli_phy_set_vct_en_cmd,
        "phy GPHYPORT_ID vct (enable|disable)",
        "Phy module",
        "Gport id",
        "VCT",
        "Eanble VCT",
        "Disable VCT"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_VCT_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_vct_result,
        ctc_cli_phy_show_vct_result_cmd,
        "show phy-port GPHYPORT_ID vct-result",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "VCT result"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    port_cable_info_t vct_result;
    uint32 gport = 0;

    sal_memset(&vct_result, 0, sizeof(port_cable_info_t));

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_VCT_RESULT,(void*)&vct_result);
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t pair_A  pair_length:%d | pair_status:0x%x\n",vct_result.pair_A.pair_length,vct_result.pair_A.pair_status);
    ctc_cli_out("\t pair_B  pair_length:%d | pair_status:0x%x\n",vct_result.pair_B.pair_length,vct_result.pair_B.pair_status);
    ctc_cli_out("\t pair_C  pair_length:%d | pair_status:0x%x\n",vct_result.pair_C.pair_length,vct_result.pair_C.pair_status);
    ctc_cli_out("\t pair_D  pair_length:%d | pair_status:0x%x\n",vct_result.pair_D.pair_length,vct_result.pair_D.pair_status);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_mdi_mdix_mode,
        ctc_cli_phy_set_mdi_mdix_mode_cmd,
        "phy GPHYPORT_ID mdi_mdix MODE",
        "Phy module",
        "Gport id",
        "Mdi_mdix",
        "Mdi_mdix mode"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    uint32 mode = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    CTC_CLI_GET_UINT16("mode", mode, argv[1]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_MDIMDIX_MODE,&mode);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_mdi_mdix_mode,
        ctc_cli_phy_show_mdi_mdix_mode_cmd,
        "show phy-port GPHYPORT_ID mdi_mdix_mode",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Mdi_mdix mode"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 mode;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif
    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_MDIMDIX_MODE,(void*)&mode);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t mdi_mdix mode:%d\n",mode);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_downgrade_en,
        ctc_cli_phy_set_downgrade_en_cmd,
        "phy GPHYPORT_ID downgrade (enable|disable)",
        "Phy module",
        "Gport id",
        "Downgrade",
        "Eanble downgrade",
        "Disable downgrade"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    uint32 enable = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        enable = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        enable = 0;
    }

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_DOWNGRADE_EN,&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_downgrade_en,
        ctc_cli_phy_show_downgrade_en_cmd,
        "show phy-port GPHYPORT_ID downgrade_en",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Downgrade"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 en;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_DOWNGRADE_EN,(void*)&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t downgrade_en:%d\n",en);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_fast_link_down_en,
        ctc_cli_phy_set_fast_link_down_cmd,
        "phy GPHYPORT_ID fast_link_down (enable|disable) delay DELAY",
        "Phy module",
        "Gport id",
        "Fast link down",
        "Eanble fast_link_down",
        "Disable fast_link_down",
        "Fast link down delay",
        "Delay"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    fast_link_down_t fast_link_down;

    sal_memset(&fast_link_down, 0, sizeof(fast_link_down_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        fast_link_down.enable = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        fast_link_down.enable = 0;
    }
    CTC_CLI_GET_UINT16("delay", fast_link_down.delay, argv[2]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_FASTLINKDOWN,&fast_link_down);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_fast_link_down_en,
        ctc_cli_phy_show_fast_link_down_en_cmd,
        "show phy-port GPHYPORT_ID fast_link_down",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Downgrade"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    fast_link_down_t fast_link_down;
    uint32 gport = 0;

    sal_memset(&fast_link_down, 0, sizeof(fast_link_down_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif
    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_FASTLINKDOWN,(void*)&fast_link_down);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t fast_link_down enable:%d\n",fast_link_down.enable);
    ctc_cli_out("\t fast_link_down delay:%d\n",fast_link_down.delay);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_jumbo_en,
        ctc_cli_phy_set_jumbo_en_cmd,
        "phy GPHYPORT_ID jumbo (enable|disable)",
        "Phy module",
        "Gport id",
        "Jumbo frame",
        "Eanble jumbo",
        "Disable jumbo"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    uint32 enable = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        enable = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        enable = 0;
    }

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_JUMBO,&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_jumbo_en,
        ctc_cli_phy_show_jumbo_en_cmd,
        "show phy-port GPHYPORT_ID jumbo",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Jumbo frame"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 en;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_JUMBO,(void*)&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t jumbo:%d\n",en);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_synce_en,
        ctc_cli_phy_set_synce_en_cmd,
        "phy GPHYPORT_ID synce CHANNEL (enable|disable) freq FREQ",
        "Phy module",
        "Gport id",
        "SyncE",
        "SyncE channel",
        "Eanble synce",
        "Disable synce",
        "SyncE freq",
        "FREQ"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    synce_t synce;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("syncechannel", synce.channel, argv[1]);

    if (CLI_CLI_STR_EQUAL("enable", 2))
    {
        synce.enable= 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 2))
    {
        synce.enable= 0;
    }
    CTC_CLI_GET_UINT16("freq", synce.freq, argv[3]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_SYNCE,&synce);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_synce_en,
        ctc_cli_phy_show_synce_en_cmd,
        "show phy-port GPHYPORT_ID synce CHANNEL",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "SyncE",
        "SyncE channel"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    synce_t synce;
    uint32 gport = 0;

    sal_memset(&synce, 0, sizeof(synce_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("channel", synce.channel, argv[1]);
    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_SYNCE,(void*)&synce);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t synce channel:%d\n",synce.channel);
    ctc_cli_out("\t synce enable:%d\n",synce.enable);
    ctc_cli_out("\t synce freq:%d\n",synce.freq);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_prbs_en,
        ctc_cli_phy_set_prbs_en_cmd,
        "phy GPHYPORT_ID prbs (enable|disable) PRBS",
        "Phy module",
        "Gport id",
        "PRBS",
        "Eanble prbs",
        "Disable prbs",
        "5 - prbs7,6 - prbs10,7 - prbs31"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    prbs_en_t prbs;

    sal_memset(&prbs, 0, sizeof(prbs_en_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        prbs.enable = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        prbs.enable = 0;
    }
    CTC_CLI_GET_UINT16("prbs", prbs.prbs, argv[2]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_PRBS,&prbs);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_prbs_en,
        ctc_cli_phy_show_prbs_en_cmd,
        "show phy-port GPHYPORT_ID prbs",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "PRBS"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    prbs_en_t prbs;
    uint32 gport = 0;

    sal_memset(&prbs, 0, sizeof(prbs_en_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PRBS,(void*)&prbs);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t prbs enable:%d\n",prbs.enable);
    ctc_cli_out("\t prbs prbs:%d\n",prbs.prbs);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_prbs_check_en,
        ctc_cli_phy_set_prbs_check_en_cmd,
        "phy GPHYPORT_ID prbs-check (enable|disable) PRBS",
        "Phy module",
        "Gport id",
        "PRBS check",
        "Eanble prbs",
        "Disable prbs",
        "5 - prbs7,6 - prbs10,7 - prbs31"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    prbs_en_t prbs;

    sal_memset(&prbs, 0, sizeof(prbs_en_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        prbs.enable = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        prbs.enable = 0;
    }
    CTC_CLI_GET_UINT16("prbs", prbs.prbs, argv[2]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_PRBS_CK,&prbs);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_prbs_check_en,
        ctc_cli_phy_show_prbs_check_en_cmd,
        "show phy-port GPHYPORT_ID prbs-check",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "PRBS check"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    prbs_en_t prbs;
    uint32 gport = 0;

    sal_memset(&prbs, 0, sizeof(prbs_en_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PRBS_CK,(void*)&prbs);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t prbs check enable:%d\n",prbs.enable);
    ctc_cli_out("\t prbs check prbs:%d\n",prbs.prbs);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_prbs_result_en,
        ctc_cli_phy_show_prbs_result_en_cmd,
        "show phy-port GPHYPORT_ID prbs-result",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "PRBS check"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    prbs_result_t prbs_result;
    uint32 gport = 0;

    sal_memset(&prbs_result, 0, sizeof(prbs_result_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty, gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_PRBS_RESULT,(void*)&prbs_result);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t prbs prbs:%d\n",prbs_result.prbs);
    ctc_cli_out("\t prbs sync:%d\n",prbs_result.sync);
    ctc_cli_out("\t prbs error:%d\n",prbs_result.error);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_test_mode,
        ctc_cli_phy_set_test_mode_cmd,
        "phy GPHYPORT_ID test_mode MODE speed SPEED",
        "Phy module",
        "Gport id",
        "Test mode",
        "MODE",
        "Speed",
        "SPEED"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    test_mode_t test;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("mode", test.mode, argv[1]);
    CTC_CLI_GET_UINT16("speed", test.speed, argv[2]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_TESTMODE,(void*)&test);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_mdio_ext_read,
            ctc_cli_phy_mdio_ext_read_cmd,
            "phy ext_read GPHYPORT_ID (reg-addr ADDR)",
            "phy module",
            "read ext operate",
            "Gport id",
            "register address",
            "ADDR")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 gport = 0;
    phy_ext_t phy_ext;

    sal_memset(&phy_ext, 0, sizeof(phy_ext_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("addr", phy_ext.reg, argv[index + 1]);
    }

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_EXT_READ,(void*)&phy_ext);

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("\t phy_ext reg:0x%x\n",phy_ext.reg);
    ctc_cli_out("\t phy_ext value:0x%x\n",phy_ext.value);


    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_mdio_ext_write,
            ctc_cli_phy_mdio_ext_write_cmd,
            "phy ext_write GPHYPORT_ID (reg-addr ADDR value VAL)",
            "phy module",
            "write ext operate",
            "Gport id",
            "register address",
            "ADDR",
            "value",
            "VALUE")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 gport = 0;
    phy_ext_t phy_ext;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", phy_ext.reg, argv[index + 1]);
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("value", phy_ext.value, argv[index + 1]);
    }
    
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_EXT_WRITE,(void*)&phy_ext);
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_mdio_page_read,
            ctc_cli_phy_mdio_page_read_cmd,
            "phy page_read GPHYPORT_ID page PAGE (reg-addr ADDR) ",
            "phy module",
            "read ext operate",
            "Gport id",
            "page",
            "0-UTP  1-QSGMII  2-SGMII",
            "register address",
            "ADDR")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 gport = 0;
    phy_page_ext_t phy_ext;

    sal_memset(&phy_ext, 0, sizeof(phy_ext_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("page", phy_ext.page, argv[1]);

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("addr", phy_ext.reg, argv[index + 1]);
    }

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_PAGE_READ,(void*)&phy_ext);

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("\t phy_ext page:0x%x\n",phy_ext.page);
    ctc_cli_out("\t phy_ext reg:0x%x\n",phy_ext.reg);
    ctc_cli_out("\t phy_ext value:0x%x\n",phy_ext.value);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_mdio_page_write,
            ctc_cli_phy_mdio_page_write_cmd,
            "phy page_write GPHYPORT_ID page PAGE (reg-addr ADDR value VAL)",
            "phy module",
            "write ext operate",
            "Gport id",
            "page",
            "0-UTP  1-QSGMII  2-SGMII",
            "register address",
            "ADDR",
            "value",
            "VALUE")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 gport = 0;
    phy_page_ext_t phy_ext;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("page", phy_ext.page, argv[1]);

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", phy_ext.reg, argv[index + 1]);
    }

    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("value", phy_ext.value, argv[index + 1]);
    }

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_PAGE_WRITE,(void*)&phy_ext);
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_mdio_page_ext_read,
            ctc_cli_phy_mdio_page_ext_read_cmd,
            "phy page_ext_read GPHYPORT_ID page PAGE (reg-addr ADDR) ",
            "phy module",
            "read ext operate",
            "Gport id",
            "page",
            "0-UTP  1-QSGMII  2-SGMII",
            "register address",
            "ADDR")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 gport = 0;
    phy_page_ext_t phy_ext;

    sal_memset(&phy_ext, 0, sizeof(phy_ext_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("page", phy_ext.page, argv[1]);

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("addr", phy_ext.reg, argv[index + 1]);
    }

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_PAGE_EXT_READ,(void*)&phy_ext);

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }
    ctc_cli_out("\t phy_ext reg:0x%x\n",phy_ext.reg);
    ctc_cli_out("\t phy_ext value:0x%x\n",phy_ext.value);


    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_mdio_page_ext_write,
            ctc_cli_phy_mdio_page_ext_write_cmd,
            "phy page_ext_write GPHYPORT_ID page PAGE (reg-addr ADDR value VAL)",
            "phy module",
            "write ext operate",
            "Gport id",
            "page",
            "0-UTP  1-QSGMII  2-SGMII",
            "register address",
            "ADDR",
            "value",
            "VALUE")
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint8 index = 0xFF;
    uint32 gport = 0;
    phy_page_ext_t phy_ext;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("page", phy_ext.page, argv[1]);

    index = CTC_CLI_GET_ARGC_INDEX("reg-addr");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("reg-addr", phy_ext.reg, argv[index + 1]);
    }
    
    index = CTC_CLI_GET_ARGC_INDEX("value");
    if (0xFF != index)
    {
        CTC_CLI_GET_UINT16("value", phy_ext.value, argv[index + 1]);
    }
    
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_PAGE_EXT_WRITE,(void*)&phy_ext);
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_lds_en,
        ctc_cli_phy_set_lds_en_cmd,
        "phy GPHYPORT_ID lds (enable|disable)",
        "Phy module",
        "Gport id",
        "LDS",
        "Eanble LDS",
        "Disable LDS"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LDS_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_lds,
        ctc_cli_phy_show_lds_cmd,
        "show phy-port GPHYPORT_ID lds",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LDS"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LDS_EN,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t lds_en:%d\n",enable);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_lds_details,
        ctc_cli_phy_show_lds_details_cmd,
        "show phy-port GPHYPORT_ID lds details",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LDS",
        "LDS details"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    lds_detail_t lds_detail;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LDS_RESULT,(void*)&lds_detail);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t lds_detail.linkup:%d\n",lds_detail.linkup);
    ctc_cli_out("\t lds_detail.length:%d\n",lds_detail.length);
    ctc_cli_out("\t lds_detail.result:%d\n",lds_detail.result);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_led_en,
        ctc_cli_phy_set_led_en_cmd,
        "phy GPHYPORT_ID led (enable|disable)",
        "Phy module",
        "Gport id",
        "LED",
        "Eanble LED",
        "Disable LED"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LED_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_led,
        ctc_cli_phy_show_led_cmd,
        "show phy-port GPHYPORT_ID led",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LED"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LED_EN,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t led_en:%d\n",enable);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_led_mode,
        ctc_cli_phy_set_led_mode_cmd,
        "phy GPHYPORT_ID led mode MODE",
        "Phy module",
        "Gport id",
        "LED",
        "LED mode",
        "MODE"
        )
{
    int32 ret = 0;
    int32 mode = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("mode", mode, argv[1]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LED_MODE,&mode);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_led_mode,
        ctc_cli_phy_show_led_mode_cmd,
        "show phy-port GPHYPORT_ID led mode",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LED",
        "LED mode"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 mode;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LED_MODE,(void*)&mode);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t led_mode:%d\n",mode);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_led_serial,
        ctc_cli_phy_set_led_serial_cmd,
        "phy GPHYPORT_ID led serial",
        "Phy module",
        "Gport id",
        "LED",
        "LED serial"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    led_serial_t led_serial[24];

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    led_serial[0].port_num = 0;
    led_serial[0].led_num= 0;
    led_serial[1].port_num = 1;
    led_serial[1].led_num= 0;
    led_serial[2].port_num = 2;
    led_serial[2].led_num= 0;
    led_serial[3].port_num = 3;
    led_serial[3].led_num= 0;
    led_serial[4].port_num = 4;
    led_serial[4].led_num= 0;
    led_serial[5].port_num = 5;
    led_serial[5].led_num= 0;
    led_serial[6].port_num = 6;
    led_serial[6].led_num= 0;
    led_serial[7].port_num = 7;
    led_serial[7].led_num= 0;

    led_serial[8].port_num = 0;
    led_serial[8].led_num= 1;
    led_serial[9].port_num = 1;
    led_serial[9].led_num= 1;
    led_serial[10].port_num = 2;
    led_serial[10].led_num= 1;
    led_serial[11].port_num = 3;
    led_serial[11].led_num= 1;
    led_serial[12].port_num = 4;
    led_serial[12].led_num= 1;
    led_serial[13].port_num = 5;
    led_serial[13].led_num= 1;
    led_serial[14].port_num = 6;
    led_serial[14].led_num= 1;
    led_serial[15].port_num = 7;
    led_serial[15].led_num= 1;

    led_serial[16].port_num = 0;
    led_serial[16].led_num= 2;
    led_serial[17].port_num = 1;
    led_serial[17].led_num= 2;
    led_serial[18].port_num = 2;
    led_serial[18].led_num= 2;
    led_serial[19].port_num = 3;
    led_serial[19].led_num= 2;
    led_serial[20].port_num = 4;
    led_serial[20].led_num= 2;
    led_serial[21].port_num = 5;
    led_serial[21].led_num= 2;
    led_serial[22].port_num = 6;
    led_serial[22].led_num= 2;
    led_serial[23].port_num = 7;
    led_serial[23].led_num= 2;

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LED_SERIAL,(void*)&led_serial);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_led_serial,
        ctc_cli_phy_show_led_serial_cmd,
        "show phy-port GPHYPORT_ID led serial",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LED",
        "LED serial"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    int32 i = 0;
    uint32 gport = 0;
    led_serial_t led_serial[24];

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LED_SERIAL,(void*)&led_serial);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    for(i=0;i<24;i++)
    {
        ctc_cli_out("\t led_serial[%d].port_num: %d\n",i,led_serial[i].port_num);
        ctc_cli_out("\t led_serial[%d].led_num: %d\n",i,led_serial[i].led_num);
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_led_glbconfig,
        ctc_cli_phy_set_led_glbconfig_cmd,
        "phy GPHYPORT_ID led glbconfig act_low LOW bit_mask MASK port_en_ctrl CTRL clk_en CLK data_en DATA burst_cycle BURS clk_cycle CLKCYCLE",
        "Phy module",
        "Gport id",
        "LED",
        "LED glbconfig",
        "LED act_low",
        "LOW",
        "LED bit_mask",
        "MASK",
        "LED port_en_ctrl",
        "LED CTRL",
        "LED clk_en",
        "LED CLK",
        "LED data_en",
        "LED DATA",
        "LED burst_cycle",
        "LED BURS",
        "LED clk_cycle",
        "CLKCYCLE"
        )
{
    int32 ret = 0;
    led_details_t led_detail;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("act_low", led_detail.act_low, argv[1]);
    CTC_CLI_GET_UINT16("bit_mask", led_detail.bit_mask, argv[2]);
    CTC_CLI_GET_UINT16("port_en_ctrl", led_detail.port_en_ctrl, argv[3]);
    CTC_CLI_GET_UINT16("clk_en", led_detail.clk_en, argv[4]);
    CTC_CLI_GET_UINT16("data_en", led_detail.data_en, argv[5]);
    CTC_CLI_GET_UINT16("burst_cycle", led_detail.burst_cycle, argv[6]);
    CTC_CLI_GET_UINT16("clk_cycle", led_detail.clk_cycle, argv[7]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LED_GLB_CONFIG,&led_detail);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_led_glbconfig,
        ctc_cli_phy_show_led_glbconfig_cmd,
        "show phy-port GPHYPORT_ID led glbconfig",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LED",
        "LED glbconfig"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    led_details_t led_detail;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LED_GLB_CONFIG,(void*)&led_detail);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t act_low:%d\n",led_detail.act_low);
    ctc_cli_out("\t bit_mask:%d\n",led_detail.bit_mask);
    ctc_cli_out("\t port_en_ctrl:%d\n",led_detail.port_en_ctrl);
    ctc_cli_out("\t clk_en:%d\n",led_detail.clk_en);
    ctc_cli_out("\t data_en:%d\n",led_detail.data_en);
    ctc_cli_out("\t burst_cycle:%d\n",led_detail.burst_cycle);
    ctc_cli_out("\t clk_cycle:%d\n",led_detail.clk_cycle);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_led_blink,
        ctc_cli_phy_set_led_blink_cmd,
        "phy GPHYPORT_ID led LED blink BLINK force FORCE",
        "Phy module",
        "Gport id",
        "led",
        "LED NUM",
        "led blink",
        "BLINK",
        "led force",
        "FORCE"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    uint32 led_num = 0;
    uint16 val = 0;
    uint32 led = 0;
    uint32 value = 0;
    uint32 force = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("led_num", led_num, argv[1]);
    CTC_CLI_GET_UINT16("val", val, argv[2]);
    CTC_CLI_GET_UINT16("force", force, argv[3]);

    value |= val;
    led |= 0x1 << (led_num + 14);
    value |= led;
    force = force << 17;
    value |= force;
    ctc_cli_out("\t value:0x%llx\n",value);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LED_BLINK,&value);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_led_blink,
        ctc_cli_phy_show_led_blink_cmd,
        "show phy-port GPHYPORT_ID led LED blink",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Led",
        "LED NUM",
        "LED blink"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 led_blink;
    uint32 gport = 0;
    uint32 led_num = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("led", led_num, argv[1]);

    led_blink |= 0x1 << (led_num + 14);
    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LED_BLINK,(void*)&led_blink);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t led_blink:0x%llx\n",led_blink);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_led_blink_act,
        ctc_cli_phy_set_led_blink_act_cmd,
        "phy GPHYPORT_ID led blink_act led_blk_duty_cycle CYCLE led_blk_freq FREQF",
        "Phy module",
        "Gport id",
        "led",
        "led blink_act",
        "led_blk_duty_cycle",
        "CYCLE",
        "led_blk_freq",
        "FREQ"
        )
{
    int32 ret = 0;
    led_blink_act_t led_blink_act;
    uint8 lchip = 0;
    uint32 gport = 0;

    sal_memset(&led_blink_act, 0, sizeof(led_blink_act_t));
    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("dutycycle", led_blink_act.led_blk_duty_cycle, argv[1]);
    CTC_CLI_GET_UINT16("freq", led_blink_act.led_blk_freq, argv[2]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_LED_BLINK_ACT,&led_blink_act);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_led_blink_act,
        ctc_cli_phy_show_led_blink_act_cmd,
        "show phy-port GPHYPORT_ID led blink_act",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "LED",
        "LED blink_act"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    led_blink_act_t led_blink_act;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LED_BLINK_ACT,(void*)&led_blink_act);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t led_blk_duty_cycle:%d\n",led_blink_act.led_blk_duty_cycle);
    ctc_cli_out("\t led_blk_freq:%d\n",led_blink_act.led_blk_freq);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_port_link_status_details,
        ctc_cli_phy_show_port_link_status_details_cmd,
        "show phy-port GPHYPORT_ID link_status_details",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "link_status_details"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    link_status_t link_status_details;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_LINK_STATUS_DETAILS,(void*)&link_status_details);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t speed_status:%d\n",link_status_details.speed_status);
    ctc_cli_out("\t duplex_status:%d\n",link_status_details.duplex_status);
    ctc_cli_out("\t auto_neg_status:%d\n",link_status_details.auto_neg_status);
    ctc_cli_out("\t link_up:%d\n",link_status_details.link_up);
    ctc_cli_out("\t medium:%d\n",link_status_details.medium);
    ctc_cli_out("\t qsg_link_up:%d\n",link_status_details.qsg_link_up);
    ctc_cli_out("\t qsg_speed_status:%d\n",link_status_details.qsg_speed_status);
    ctc_cli_out("\t sg_link_up:%d\n",link_status_details.sg_link_up);
    ctc_cli_out("\t sg_speed_status:%d\n",link_status_details.sg_speed_status);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_sleep_en,
        ctc_cli_phy_set_sleep_en_cmd,
        "phy GPHYPORT_ID sleep (enable|disable)",
        "Phy module",
        "Gport id",
        "SLEEP",
        "Eanble SLEEP",
        "Disable SLEEP"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_SLEEP_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_sleep,
        ctc_cli_phy_show_sleep_cmd,
        "show phy-port GPHYPORT_ID sleep",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "SLEEP"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_SLEEP_EN,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t sleep:%d\n",enable);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_eee_en,
        ctc_cli_phy_set_eee_en_cmd,
        "phy GPHYPORT_ID eee (enable|disable)",
        "Phy module",
        "Gport id",
        "EEE",
        "Eanble EEE",
        "Disable EEE"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_EEE_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_eee,
        ctc_cli_phy_show_eee_cmd,
        "show phy-port GPHYPORT_ID eee",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "EEE"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_EEE_EN,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t eee:%d\n",enable);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_eee_status,
        ctc_cli_phy_show_eee_status_cmd,
        "show phy-port GPHYPORT_ID eee_status",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "EEE status"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 status;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_EEE_STATUS,(void*)&status);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t eee_status:%d\n",status);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_fib_to_sgmii_en,
        ctc_cli_phy_set_fib_to_sgmii_en_cmd,
        "phy GPHYPORT_ID fib_to_sgmii (enable|disable)",
        "Phy module",
        "Gport id",
        "fib_to_sgmii",
        "Eanble fib_to_sgmii",
        "Disable fib_to_sgmii"
        )
{
    int32 ret = 0;
    int32 en = 0;
    uint8 lchip = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    if (CLI_CLI_STR_EQUAL("enable", 1))
    {
        en = 1;
    }
    else if (CLI_CLI_STR_EQUAL("disable", 1))
    {
        en = 0;
    }
    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_FIB_TO_SGMII_EN,&en);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_fib_to_sgmii,
        ctc_cli_phy_show_fib_to_sgmii_cmd,
        "show phy-port GPHYPORT_ID fib_to_sgmii",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "fib_to_sgmii"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 enable;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_FIB_TO_SGMII_EN,(void*)&enable);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t fib_to_sgmii:%d\n",enable);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_chip_mode_en,
        ctc_cli_phy_set_chip_mode_cmd,
        "phy GPHYPORT_ID chip_mode MODE",
        "Phy module",
        "Gport id",
        "chip_mode",
        "MODE"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    uint32 mode = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    CTC_CLI_GET_UINT16("mode", mode, argv[1]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_CHIP_MODE,&mode);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_chip_mode,
        ctc_cli_phy_show_chip_mode_cmd,
        "show phy-port GPHYPORT_ID chip_mode",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "chip_mode"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 mode;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_CHIP_MODE,(void*)&mode);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t chip_mode:%d\n",mode);

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_chip_warmboot_en,
        ctc_cli_phy_set_chip_warmboot_en_cmd,
        "phy all warmboot",
        "Phy module",
        "All port",
        "Warmboot"
        )
{
    int32 ret = 0;

    extern int32 phy_init(uint8 load_mode, const char *pathname);
    ret += phy_init(CTC_WARMBOOT, NULL);

    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_port_speed_force,
        ctc_cli_phy_set_port_speed_force_cmd,
        "phy GPHYPORT_ID speed force (eth|fe|ge)",
        "Phy module",
        "Gport id",
        "Phy speed",
        "Phy force speed",
        "Phy speed 10M",
        "Phy speed 100M",
        "Phy speed 1000M"
        )
{
    int32 ret = CLI_SUCCESS;
    uint8 lchip = 0;
    uint8 value = 0;
    uint8 index = 0xff;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
 
    //index = CTC_CLI_GET_ARGC_INDEX("force");
    value = CTC_PORT_SPEED_MAX;
    index = CTC_CLI_GET_ARGC_INDEX("eth");
    if (0xFF != index)
    {
        value = CTC_PORT_SPEED_10M;
    }

    index = CTC_CLI_GET_ARGC_INDEX("fe");
    if (0xFF != index)
    {
        value = CTC_PORT_SPEED_100M;
    }

    index = CTC_CLI_GET_ARGC_INDEX("ge");
    if (0xFF != index)
    {
        value = CTC_PORT_SPEED_1G;
    }

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_SPEED_FORCE, (void*)&value);

    ctc_cli_out("set speed_force value %d\n", value);
    if (ret < 0)
    {
        ctc_cli_out("%% speed_force ret = %d\n",ret);
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_phy_show_speed_force,
        ctc_cli_phy_show_speed_force_cmd,
        "show phy-port GPHYPORT_ID speed_force",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Speed force"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint8 speed_force = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_SPEED_FORCE,(void*)&speed_force);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t speed_force:%s\n",phy_port_speed_str(speed_force));

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_port_duplex_force,
        ctc_cli_phy_set_port_duplex_force_cmd,
        "phy GPHYPORT_ID duplex force (full|half)",
        "Phy module",
        "Gport id",
        "Phy duplex",
        "Phy force duplex",
        "Phy duplex full",
        "Phy duplex half"
        )
{
    int32 ret = CLI_SUCCESS;
    uint8 lchip = 0;
    uint8 value = 0;
    uint8 index = 0xff;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    //index = CTC_CLI_GET_ARGC_INDEX("force");
    value = GLB_DUPLEX_FULL;
    index = CTC_CLI_GET_ARGC_INDEX("full");
    if (0xFF != index)
    {
        value = GLB_DUPLEX_FULL;
    }

    index = CTC_CLI_GET_ARGC_INDEX("half");
    if (0xFF != index)
    {
        value = GLB_DUPLEX_HALF;
    }

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_DUPLEX_FORCE, (void*)&value);

    ctc_cli_out("set duplex_force value %d\n", value);
    if (ret < 0)
    {
        ctc_cli_out("%% duplex_force ret = %d\n",ret);
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_phy_show_duplex_force,
        ctc_cli_phy_show_duplex_force_cmd,
        "show phy-port GPHYPORT_ID duplex_force",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Duplex force"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint8 duplex_force = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_DUPLEX_FORCE,(void*)&duplex_force);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t duplex_force:%s\n",duplex_force==1?"full":(duplex_force==2?"full":"half"));

    return CLI_SUCCESS;
}


CTC_CLI(ctc_cli_phy_set_port_speed_ability,
        ctc_cli_phy_set_port_speed_ability_cmd,
        "phy GPHYPORT_ID speed ability ABILITY",
        "Phy module",
        "Gport id",
        "speed",
        "speed_ability",
        "ABILITY"
        )
{
    int32 ret = 0;
    uint8 lchip = 0;
    uint32 gport = 0;
    uint8 ability = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif


    CTC_CLI_GET_UINT16("ability", ability, argv[1]);

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_SPEED_ABILITY,(void*)&ability);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_show_speed_ability,
        ctc_cli_phy_show_speed_ability_cmd,
        "show phy-port GPHYPORT_ID speed_ability",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Speed ability"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint8 speed_ability;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_SPEED_ABILITY,(void*)&speed_ability);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t speed_ability:0x%x\n",speed_ability);
    if (speed_ability & 0x20)
    {
        ctc_cli_out("\t     1000 full\n");
    }
    if (speed_ability & 0x8)
    {
        ctc_cli_out("\t     100 full\n");
    }
    if (speed_ability & 0x4)
    {
        ctc_cli_out("\t     100 half\n");
    }
    if (speed_ability & 0x2)
    {
        ctc_cli_out("\t     10 full\n");
    }
    if (speed_ability & 0x1)
    {
        ctc_cli_out("\t     10 half\n");
    }

    return CLI_SUCCESS;
}

CTC_CLI(ctc_cli_phy_set_port_master_slave,
        ctc_cli_phy_set_port_master_slave_cmd,
        "phy GPHYPORT_ID master_slave (auto|master|slave)",
        "Phy module",
        "Gport id",
        "Phy master_slave mode",
        "Auto",
        "Master",
        "Slave"
        )
{
    int32 ret = CLI_SUCCESS;
    uint8 lchip = 0;
    uint32 value = 0;
    uint8 index = 0xff;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
    index = CTC_CLI_GET_ARGC_INDEX("auto");
    if (0xFF != index)
    {
        value = GLB_MODE_AUTO;
    }

    index = CTC_CLI_GET_ARGC_INDEX("master");
    if (0xFF != index)
    {
        value = GLB_MODE_MASTER;
    }

    index = CTC_CLI_GET_ARGC_INDEX("slave");
    if (0xFF != index)
    {
        value = GLB_MODE_SLAVE;
    }

    ret += ctc_phy_set_port_ext_attr(lchip,gport,PHY_SET_MASTER_SLAVE, (void*)&value);

    ctc_cli_out("set master_slave value %d\n", value);
    if (ret < 0)
    {
        ctc_cli_out("%% master_slave ret = %d\n",ret);
        return CLI_ERROR;
    }

    return ret;
}

CTC_CLI(ctc_cli_phy_show_master_slave,
        ctc_cli_phy_show_master_slave_cmd,
        "show phy-port GPHYPORT_ID master_slave",
        "Show info about phy port",
        "Phy port",
        "Gport id",
        "Phy master_slave mode"
        )
{
    uint8 lchip = 0;
    int32 ret = 0;
    uint32 master_slave = 0;
    uint32 gport = 0;

    CTC_CLI_GET_UINT16("gport", gport, argv[0]);
#ifdef CTC_MULTI_CLIENT_EN
    lchip = ctc_phy_get_lchip(vty,gport);
#else
    lchip = ctc_phy_get_lchip(gport);
#endif

    ret += ctc_phy_get_port_ext_attr(lchip,gport,PHY_GET_MASTER_SLAVE,(void*)&master_slave);
    
    if (ret < 0)
    {
        ctc_cli_out("%% %s \n", ctc_get_error_desc(ret));
        return CLI_ERROR;
    }

    ctc_cli_out("\t master_slave:%s\n",master_slave==0?"auto":(master_slave==1?"master":"slave"));

    return CLI_SUCCESS;
}

/**
*@fn int32 ctc_phy_cli_init(void)
*@brief register phy cli to system
*@note the CLI server need init before
*/
#if defined(TSINGMA_AX)
int32
ctc_phy_cli_init(uint8 cli_tree_mode)
{
    uint8 cli_mode = cli_tree_mode;
#else
int32
ctc_phy_cli_init(void)
{
    uint8 cli_mode = CTC_SDK_MODE;
    install_element(CTC_INTERNAL_MODE, &ctc_cli_phy_debug_en_cmd);
#endif
    install_element(cli_mode, &ctc_cli_phy_set_port_attr_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_port_attr1_cmd);
    //install_element(cli_mode, &ctc_cli_phy_show_attr_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_port_attr_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_port_mapping_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_write_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_read_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_version_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_packet_checker_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_pkt_check_count_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_packet_genarator_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_packet_genarator_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_tx_dis_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_tx_dis_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_pkt_check_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_pkt_gen_setting_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_pkt_gen_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_vct_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_vct_result_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_mdi_mdix_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_mdi_mdix_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_downgrade_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_downgrade_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_fast_link_down_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_fast_link_down_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_jumbo_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_jumbo_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_synce_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_synce_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_prbs_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_prbs_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_prbs_check_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_prbs_check_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_prbs_result_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_test_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_ext_read_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_ext_write_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_lds_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_lds_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_lds_details_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_led_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_led_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_led_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_led_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_led_serial_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_led_serial_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_led_glbconfig_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_led_glbconfig_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_led_blink_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_led_blink_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_led_blink_act_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_led_blink_act_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_port_link_status_details_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_page_read_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_page_write_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_page_ext_read_cmd);
    install_element(cli_mode, &ctc_cli_phy_mdio_page_ext_write_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_sleep_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_sleep_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_eee_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_eee_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_eee_status_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_fib_to_sgmii_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_fib_to_sgmii_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_chip_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_chip_mode_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_port_speed_force_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_speed_force_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_port_duplex_force_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_duplex_force_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_port_speed_ability_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_speed_ability_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_chip_warmboot_en_cmd);
    install_element(cli_mode, &ctc_cli_phy_set_port_master_slave_cmd);
    install_element(cli_mode, &ctc_cli_phy_show_master_slave_cmd);

    return CTC_E_NONE;
}
#endif 
